Building a port scanner

Just wondering what it would mean to write this in SWI-Prolog, I got to these two files.

test_balance.pl (1.1 KB) balance.pl (4.2 KB)

The implementation is rather tricky. I did decide for an arity 2 version for now to make clean what the generator and tester are. Not yet sure what to do with it. When matured and with a proper name, add it to the library(thread), I guess.

1 Like